Architectural support for copy and tamper resistant software
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Architectural support for fast symmetric-key cryptography
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
CryptoManiac: a fast flexible architecture for secure communication
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
A verifiable secret shuffle and its application to e-voting
CCS '01 Proceedings of the 8th ACM conference on Computer and Communications Security
Application specific architectures: a recipe for fast, flexible and power efficient designs
CASES '01 Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
System design methodologies for a wireless security processing platform
Proceedings of the 39th annual Design Automation Conference
Security Engineering: A Guide to Building Dependable Distributed Systems
Security Engineering: A Guide to Building Dependable Distributed Systems
Silicon physical random functions
Proceedings of the 9th ACM conference on Computer and communications security
Fast DES Implementation for FPGAs and Its Application to a Universal Key-Search Machine
SAC '98 Proceedings of the Selected Areas in Cryptography
CryptoBooster: A Reconfigurable and Modular Cryptographic Coprocessor
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Instruction-Level Distributed Processing for Symmetric-Key Cryptography
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Computer
Security in embedded systems: Design challenges
ACM Transactions on Embedded Computing Systems (TECS)
Security on FPGAs: State-of-the-art implementations and attacks
ACM Transactions on Embedded Computing Systems (TECS)
Hardware assisted control flow obfuscation for embedded processors
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
Generic Design Space Exploration for Reconfigurable Architectures
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
Architecture for Protecting Critical Secrets in Microprocessors
Proceedings of the 32nd annual international symposium on Computer Architecture
SECA: security-enhanced communication architecture
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
CryptoScan: A Secured Scan Chain Architecture
ATS '05 Proceedings of the 14th Asian Test Symposium on Asian Test Symposium
A configurable AES processor for enhanced security
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Area-Throughput Trade-Offs for Fully Pipelined 30 to 70 Gbits/s AES Processors
IEEE Transactions on Computers
Proceedings of the 43rd annual Design Automation Conference
ACSAC '06 Proceedings of the 22nd Annual Computer Security Applications Conference
Secure IP downloading for SRAM FPGAs
Microprocessors & Microsystems
Proceedings of the conference on Design, automation and test in Europe
Communication-oriented design space exploration for reconfigurable architectures
EURASIP Journal on Embedded Systems
An overview of reconfigurable hardware in embedded systems
EURASIP Journal on Embedded Systems
HW/SW co-design for public-key cryptosystems on the 8051 micro-controller
Computers and Electrical Engineering
Establishing Chain of Trust in Reconfigurable Hardware
FCCM '07 Proceedings of the 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Reconfigurable trusted computing in hardware
Proceedings of the 2007 ACM workshop on Scalable trusted computing
Mobile Networks and Applications
PE-ICE: Parallelized Encryption and Integrity Checking Engine
DDECS '06 Proceedings of the 2006 IEEE Design and Diagnostics of Electronic Circuits and systems
Power Analysis Attacks and Countermeasures
IEEE Design & Test
Reconfigurable hardware for high-security/high-performance embedded systems: the SAFES perspective
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A system architecture for reconfigurable trusted platforms
Proceedings of the conference on Design, automation and test in Europe
An FPGA Configuration Scheme for Bitstream Protection
ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
Ultra-Lightweight Implementations for Smart Devices --- Security for 1000 Gate Equivalents
CARDIS '08 Proceedings of the 8th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Applications
DFT '08 Proceedings of the 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems
Bitstream Encryption and Authentication Using AES-GCM in Dynamically Reconfigurable Systems
IWSEC '08 Proceedings of the 3rd International Workshop on Security: Advances in Information and Computer Security
Celator: A Multi-algorithm Cryptographic Co-processor
RECONFIG '08 Proceedings of the 2008 International Conference on Reconfigurable Computing and FPGAs
Lest we remember: cold-boot attacks on encryption keys
Communications of the ACM - Security in the Browser
Post Quantum Cryptography
CCproc: A Custom VLIW Cryptography Co-processor for Symmetric-Key Ciphers
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
Analysis and design of active IC metering schemes
HST '09 Proceedings of the 2009 IEEE International Workshop on Hardware-Oriented Security and Trust
Cache Timing Attacks on Clefia
INDOCRYPT '09 Proceedings of the 10th International Conference on Cryptology in India: Progress in Cryptology
A Survey of Hardware Trojan Taxonomy and Detection
IEEE Design & Test
Preventing IC Piracy Using Reconfigurable Logic Barriers
IEEE Design & Test
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Boosting AES performance on a tiny processor core
CT-RSA'08 Proceedings of the 2008 The Cryptopgraphers' Track at the RSA conference on Topics in cryptology
Single- and multi-core configurable AES architectures for flexible security
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low-power sub-threshold design of secure physical unclonable functions
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Experimental Security Analysis of a Modern Automobile
SP '10 Proceedings of the 2010 IEEE Symposium on Security and Privacy
A reconfigurable crypto sub system for the software communication architecture
MILCOM'09 Proceedings of the 28th IEEE conference on Military communications
FPL '10 Proceedings of the 2010 International Conference on Field Programmable Logic and Applications
HCrypt: A Novel Concept of Crypto-processor with Secured Key Management
RECONFIG '10 Proceedings of the 2010 International Conference on Reconfigurable Computing and FPGAs
Cryptanalysis of CLEFIA using differential methods with cache trace patterns
CT-RSA'11 Proceedings of the 11th international conference on Topics in cryptology: CT-RSA 2011
Mutual Information Analysis: a Comprehensive Study
Journal of Cryptology - Special Issue on Hardware and Security
Design and implementation of a multi-core crypto-processor for software defined radios
ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications
Secure virtualization within a multi-processor soft-core system-on-chip architecture
ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications
Implementing Gentry's fully-homomorphic encryption scheme
EUROCRYPT'11 Proceedings of the 30th Annual international conference on Theory and applications of cryptographic techniques: advances in cryptology
Comprehensive experimental analyses of automotive attack surfaces
SEC'11 Proceedings of the 20th USENIX conference on Security
Can homomorphic encryption be practical?
Proceedings of the 3rd ACM workshop on Cloud computing security workshop
Proceedings of the 18th ACM conference on Computer and communications security
Security Trends for FPGAS: From Secured to Secure Reconfigurable Systems
Security Trends for FPGAS: From Secured to Secure Reconfigurable Systems
Distributed Security for Communications and Memories in a Multiprocessor Architecture
IPDPSW '11 Proceedings of the 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and PhD Forum
An instruction set extension for fast and memory-efficient AES implementation
CMS'05 Proceedings of the 9th IFIP TC-6 TC-11 international conference on Communications and Multimedia Security
Instruction set extensions for efficient AES implementation on 32-bit processors
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Cache attacks and countermeasures: the case of AES
CT-RSA'06 Proceedings of the 2006 The Cryptographers' Track at the RSA conference on Topics in Cryptology
Cryptographics: secret key cryptography using graphics cards
CT-RSA'05 Proceedings of the 2005 international conference on Topics in Cryptology
CT-RSA'12 Proceedings of the 12th conference on Topics in Cryptology
Secure Scan: A Design-for-Test Architecture for Crypto Chips
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Throughput, flexibility, and security form the design trilogy of reconfigurable crypto engines; they must be carefully considered without reducing the major role of classical design constraints, such as surface, power consumption, dependability, and cost. Applications such as network security, Virtual Private Networks (VPN), Digital Rights Management (DRM), and pay per view have drawn attention to these three constraints. For more than ten years, many studies in the field of cryptographic engineering have focused on the design of optimized high-throughput hardware cryptographic cores (e.g., symmetric and asymmetric key block ciphers, stream ciphers, and hash functions). The flexibility of cryptographic systems plays a very important role in their practical application. Reconfigurable hardware systems can evolve with algorithms, face up to new types of attacks, and guarantee interoperability between countries and institutions. The flexibility of reconfigurable crypto processors and crypto coprocessors has reached new levels with the emergence of dynamically reconfigurable hardware architectures and tools. Last but not least, the security of systems that handle confidential information needs to be thoroughly evaluated at the design stage in order to meet security objectives that depend on the importance of the information to be protected and on the cost of protection. Usually, designers tackle security problems at the same time as other design constraints and in many cases target only one security objective, for example, a side-channel attack countermeasures, fault tolerance capability, or the monitoring of the device environment. Only a few authors have addressed all three design constraints at the same time. In particular, key management security (e.g., secure key generation and transmission, the use of a hierarchical key structure composed of session keys and master keys) has frequently been neglected to the benefit of performance and/or flexibility. Nevertheless, a few authors propose original processor architectures based on multi-crypto-processor structures and reconfigurable cryptographic arrays. In this article, we review published works on symmetric key crypto engines and present current trends and design challenges.