Reconfigurable hardware for high-security/high-performance embedded systems: the SAFES perspective

Authors:
Guy Gogniat;Tilman Wolf;Wayne Burleson;Jean-Philippe Diguet;Lilian Bossuet;Romain Vaslin
Affiliations:
Laboratory of Electronic and REal Time Systems (LESTER), University of South Britanny, Lorient, France;Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA;Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA;Laboratory of Electronic and REal Time Systems (LESTER), University of South Britanny, Lorient, France;IMS Laboratory, ENSEIRB, University of Bordeaux 1, Bordeaux, France;Laboratory of Electronic and REal Time Systems (LESTER), University of South Britanny, Lorient, France
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2008

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Abstract

Embedded systems present significant security challenges due to their limited resources and power constraints. This paper focuses on the issues of building secure embedded systems on reconfigurable hardware and proposes a security architecture for embedded systems (SAFES). SAFES leverages the capabilities of reconfigurable hardware to provide efficient and flexible architectural support for security standards and defenses against a range of hardware attacks. The SAFES architecture is based on three main ideas: 1) reconfigurable security primitives; 2) reconfigurable hardware monitors; and 3) a hierarchy of security controllers at the primitive, system and executive level. Results are presented for reconfigurable AES and RC6 security primitives and highlight the value of such an architecture. This paper also emphasizes that re-configurable hardware is not just a technology for hardware accelerators dedicated to security primitives as has been focused on by most studies but a real solution to provide high-security and high-performance for a system.