Reducing the branch penalty by rearranging instructions in a double-width memory

  • Authors:
  • Manolis Katevenis;Nestoras Tzartzanis

  • Affiliations:
  • -;-

  • Venue:
  • ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
  • Year:
  • 1991

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Abstract