Carbon nanotube interconnects

Authors:
Azad Naeemi;James D. Meindl
Affiliations:
Georgia Institute of Technology, Atlanta, GA;Georgia Institute of Technology, Atlanta, GA
Venue:
Proceedings of the 2007 international symposium on Physical design
Year:
2007

Citing 2
Cited 5

Single-walled carbon nanotube electronics

IEEE Transactions on Nanotechnology
Understanding the Impact of Inductance in Carbon Nanotube Bundles for VLSI Interconnect Using Scalable Modeling Techniques

IEEE Transactions on Nanotechnology

Performance modeling and optimization for single- and multi-wall carbon nanotube interconnects

Proceedings of the 44th annual Design Automation Conference
CAD implications of new interconnect technologies

Proceedings of the 44th annual Design Automation Conference
Thermally-aware modeling and performance evaluation for single-walled carbon nanotube-based interconnects for future high performance integrated circuits

Microelectronic Engineering
High speed interconnect through device optimization for subthreshold FPGA

Microelectronics Journal
Inductance modelling of SWCNT bundle interconnects using partial element equivalent circuit method

Journal of Computational Electronics

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Abstract

Based on physical models, circuit models are presented for SWNTs, SWNT-bundles and MWNTs. These models can be used for circuit simulations and compact modeling. It is demonstrated that by customizing CNT interconnects at the local, semiglobal and global levels several major challenges facing GSI systems can potentially be addressed. For local interconnects, mono- or few-layer SWNT interconnects can offer up to 50% reduction in capacitance and power dissipation with considerable improvements in latency if they are short enough (