Evaluation and Comparison of Threshold Logic Gates

Authors:
Vasilios Lirigis;Elena Dubrova
Affiliations:
Royal Institute of Technology (KTH), Sweden;Royal Institute of Technology (KTH), Sweden
Venue:
ISMVL '07 Proceedings of the 37th International Symposium on Multiple-Valued Logic
Year:
2007

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Abstract

The threshold logic has a long history of more than 60 years. Many implementations have been proposed during the last decades. In this paper, we make a survey of most interesting implementations of capacitive, conductance/current and differential threshold logic gates. Using the Cadence Virtuoso© Mixed Signal Front to Back, we evaluate and compare these implementations in terms of speed, area and power consumption for basic circuits.