Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
A Threshold Logic Synthesis Tool for RTD Circuits
DSD '04 Proceedings of the Digital System Design, EUROMICRO Systems
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
Evaluation and Comparison of Threshold Logic Gates
ISMVL '07 Proceedings of the 37th International Symposium on Multiple-Valued Logic
Decomposition based approach for synthesis of multi-level threshold logic circuits
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
A Fault Tolerance Aware Synthesis Methodology for Threshold Logic Gate Networks
DFT '08 Proceedings of the 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems
Threshold network synthesis and optimization and its application to nanotechnologies
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
VLSI implementations of threshold logic-a comprehensive survey
IEEE Transactions on Neural Networks
An efficient heuristic to identify threshold logic functions
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Nanopipelined threshold network synthesis
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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This paper presents a scalable method to determine that a Boolean function is a threshold logic function. When the number of inputs of the function increases, identifying a threshold logic function is a laborious task. It is shown experimentally that the proposed method is faster and identifies more threshold logic functions with weight assignment than any other existing method.