Combinational equivalence checking for threshold logic circuits
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Automatic test generation for combinational threshold logic networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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A fault tolerant threshold logic gate design
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Review of capacitive threshold gate implementations
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Constructive threshold logic addition: a synopsis of the last decade
ICANN/ICONIP'03 Proceedings of the 2003 joint international conference on Artificial neural networks and neural information processing
Scalable identification of threshold logic functions
Proceedings of the 20th symposium on Great lakes symposium on VLSI
ICES'07 Proceedings of the 7th international conference on Evolvable systems: from biology to hardware
Memristor based programmable threshold logic array
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Optimal synthesis of boolean functions by threshold functions
ICANN'06 Proceedings of the 16th international conference on Artificial Neural Networks - Volume Part I
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IWANN'05 Proceedings of the 8th international conference on Artificial Neural Networks: computational Intelligence and Bioinspired Systems
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IWANN'05 Proceedings of the 8th international conference on Artificial Neural Networks: computational Intelligence and Bioinspired Systems
An efficient heuristic to identify threshold logic functions
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Minimizing area and power of sequential CMOS circuits using threshold decomposition
Proceedings of the International Conference on Computer-Aided Design
Decomposition of threshold functions into bounded fan-in threshold functions
Information and Computation
Sensitization criterion for threshold logic circuits and its application
Proceedings of the International Conference on Computer-Aided Design
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This paper is an in-depth review on silicon implementations of threshold logic gates that covers several decades. In this paper, we will mention early MOS threshold logic solutions and detail numerous very-large-scale integration (VLSI) implementations including capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS and output-wired-inverters, including a plethora of solutions evolved from them), as well as many differential solutions. At the end, we will briefly mention other implementations, e.g., based on negative resistance devices and on single electron technologies.