NBTI tolerant microarchitecture design in the presence of process variation
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Skew management of NBTI impacted gated clock trees
Proceedings of the 19th international symposium on Physical design
Analysis and optimization of NBTI induced clock skew in gated clock trees
Proceedings of the Conference on Design, Automation and Test in Europe
Controlling NBTI degradation during static burn-in testing
Proceedings of the 16th Asia and South Pacific Design Automation Conference
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This paper presents a simulation framework for reliability analysis of circuits in the SPICE environment. The framework incorporates the degradation of physical parameters such as threshold voltage (Vtp) into circuit simulation and enables the design of highly reliable circuits. The parameter degradation is based on the numerical solution for the reaction-diffusion (R-D) mechanism, which is a general model applicable to various reliability effects such as NBTI, HCI, NCS, and SEE. In particular, the accuracy and efficiency of this method was verified for NBTI degradation with 130nm experimental and simulation data over a wide range of stress voltages and temperature. The model also accurately captures the dependence of NBTI on multiple diffusion species (H/H2,), key process (Vth, tox) and environmental parameters (VDD, temperature). The circuit level performance of this method is verified with silicon data from ring-oscillator circuit. We also investigated the predicted impact of NBTI on representative digital circuits.