An algorithm to minimize leakage through simultaneous input vector control and circuit modification

Authors:
Nikhil Jayakumar;Sunil P Khatri
Affiliations:
Texas A&M University, College Station TX;Texas A&M University, College Station TX
Venue:
Proceedings of the conference on Design, automation and test in Europe
Year:
2007

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Abstract

Leakage power currently comprises a large fraction of the total power consumption of an IC. Techniques to minimize leakage have been researched widely. In this paper, we present an approach which minimizes leakage by simultaneously modifying the circuit while deriving the input vector that minimizes leakage. In our approach, we selectively modify a gate so that its output (in sleep mode) is in a state which helps minimize the leakage of other gates in its transitive fanout. Gate replacement is performed in a slack-aware manner, to minimize the resulting delay penalty.