Leakage current reduction in CMOS VLSI circuits by input vector control
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Enhanced leakage reduction Technique by gate replacement
Proceedings of the 42nd annual Design Automation Conference
Exact and heuristic approaches to input vector control for leakage power reduction
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Impact of NBTI on SRAM Read Stability and Design for Reliability
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A combined gate replacement and input vector control approach for leakage current reduction
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 43rd annual Design Automation Conference
Electronics beyond nano-scale CMOS
Proceedings of the 43rd annual Design Automation Conference
Modeling and minimization of PMOS NBTI effect for robust nanometer design
Proceedings of the 43rd annual Design Automation Conference
An analytical model for negative bias temperature instability
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Temperature-aware NBTI modeling and the impact of input vector control on performance degradation
Proceedings of the conference on Design, automation and test in Europe
An algorithm to minimize leakage through simultaneous input vector control and circuit modification
Proceedings of the conference on Design, automation and test in Europe
The impact of NBTI on the performance of combinational and sequential circuits
Proceedings of the 44th annual Design Automation Conference
NBTI-aware synthesis of digital circuits
Proceedings of the 44th annual Design Automation Conference
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Penelope: The NBTI-Aware Processor
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Adaptive techniques for overcoming performance degradation due to aging in digital circuits
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Scheduled voltage scaling for increasing lifetime in the presence of NBTI
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
On the efficacy of input Vector Control to mitigate NBTI effects and leakage power
ISQED '09 Proceedings of the 2009 10th International Symposium on Quality of Electronic Design
Minimization of NBTI performance degradation using internal node control
Proceedings of the Conference on Design, Automation and Test in Europe
Gate replacement techniques for simultaneous leakage and aging optimization
Proceedings of the Conference on Design, Automation and Test in Europe
Models and algorithms for bounds on leakage in CMOS circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Leakage power bounds in CMOS digital technologies
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Exact and Heuristic Approaches to Input Vector Control for Leakage Power Reduction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
TG-based technique for NBTI degradation and leakage optimization
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
M-IVC: Applying multiple input vectors to co-optimize aging and leakage
Microelectronics Journal
Reducing NBTI-induced processor wearout by exploiting the timing slack of instructions
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Variation-aware supply voltage assignment for simultaneous power and aging optimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
NBTI mitigation by optimized NOP assignment and insertion
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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As technology scales, the aging effect caused by negative bias temperature instability (NBTI) has become a major reliability concern. In the mean time, reducing leakage power remains to be one of the key design goals. Because both NBTI-induced circuit degradation and standby leakage power have a strong dependency on the input vectors, input vector control (IVC) technique could be adopted to reduce the leakage power and mitigate NBTI-induced degradation. The IVC technique, however, is ineffective for larger circuits. Consequently, in this paper, we propose two gate replacement algorithms [direct gate replacement (DGR) algorithm and divide and conquer-based gate replacement (DCBGR) algorithm], together with optimal input vector selection, to simultaneously reduce the leakage power and mitigate NBTI-induced degradation. Our experimental results on 23 benchmark circuits reveal the following. 1) Both DGR and DCBGR algorithms outperform pure IVC technique by 15%-30% with 5% delay relaxation for three different design goals: leakage power reduction only, NBTI mitigation only, and leakage/NBTI cooptimization. 2) The DCBGR algorithm leads to better optimization results and save on average more than 10× runtime compared to the DGR algorithm. 3) The area overhead for leakage reduction is much more than that for NBTI mitigation.