WAVSTAN: waveform based variational static timing analysis

Authors:
Saurabh K Tiwary;Joel R Phillips
Affiliations:
Cadence Berkeley Labs, Berkeley, CA;Cadence Berkeley Labs, Berkeley, CA
Venue:
Proceedings of the conference on Design, automation and test in Europe
Year:
2007

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Abstract

We present a waveform based variational static timing analysis methodology. It is a timing paradigm that lies midway between convention static delay approximations and full dynamic (SPICE-level) analysis. The core idea is to break the modulation of waveforms processed by a circuit into two parts: (a) non-linear circuit elements e.g., transistors, diodes etc. and (b) linear elements: transmission line, RLC network etc. The non-linear and linear parts of the circuit are then solved using a combination of current-source modeling, model order reduction methodology, perturbation analysis and learning-based Galerkin methods which helps us get SPICE-like accuracies. The proposed method is potentially as robust and 10-20X faster than current-source based gate modeling methodologies.