Worst-case design and margin for embedded SRAM

  • Authors:
  • Robert Aitken;Sachin Idgunji

  • Affiliations:
  • ARM, Sunnyvale CA;ARM, Sunnyvale CA

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 2007

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Abstract

An important aspect of Design for Yield for embedded SRAM is identifying the expected worst case behavior in order to guarantee that sufficient design margin is present. Previously, this has involved multiple simulation corners and extreme test conditions. It is shown that statistical concerns and device variability now require a different approach, based on work in Extreme Value Theory. This method is used to develop a lower-bound for variability-related yield in memories.