Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
LEneS: task scheduling for low-energy systems using variable supply voltage processors
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Task scheduling and voltage selection for energy minimization
Proceedings of the 39th annual Design Automation Conference
SODA '03 Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms
Optimal voltage allocation techniques for dynamically variable voltage processors
Proceedings of the 40th annual Design Automation Conference
Energy-Aware Partitioning for Multiprocessor Real-Time Systems
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Energy Aware Scheduling for Distributed Real-Time Systems
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Dynamic and Aggressive Scheduling Techniques for Power-Aware Real-Time Systems
RTSS '01 Proceedings of the 22nd IEEE Real-Time Systems Symposium
Energy-Efficient Synthesis of Periodic Task Systems upon Identical Multiprocessor Platforms
ICDCS '04 Proceedings of the 24th International Conference on Distributed Computing Systems (ICDCS'04)
Leakage aware dynamic voltage scaling for real-time embedded systems
Proceedings of the 41st annual Design Automation Conference
Multiprocessor Energy-Efficient Scheduling with Task Migration Considerations
ECRTS '04 Proceedings of the 16th Euromicro Conference on Real-Time Systems
An Approximation Algorithm for Energy-Efficient Scheduling on A Chip Multiprocessor
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Energy-Aware Task Allocation for Rate Monotonic Scheduling
RTAS '05 Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium
Multiprocessor Energy-Efficient Scheduling for Real-Time Tasks with Different Power Characteristics
ICPP '05 Proceedings of the 2005 International Conference on Parallel Processing
Reliability-Aware Dynamic Energy Management in Dependable Embedded Real-Time Systems
RTAS '06 Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium
Leakage-Aware Energy-Efficient Scheduling of Real-Time Tasks in Multiprocessor Systems
RTAS '06 Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium
Procrastination for leakage-aware rate-monotonic scheduling on a dynamic voltage scaling processor
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
Journal of Signal Processing Systems
Energy-Aware Scheduling of Flow Applications on Master-Worker Platforms
Euro-Par '09 Proceedings of the 15th International Euro-Par Conference on Parallel Processing
Proceedings of the Conference on Design, Automation and Test in Europe
Staying-alive path planning with energy optimization for mobile robots
Expert Systems with Applications: An International Journal
Harvesting-aware energy management for multicore platforms with hybrid energy storage
Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
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In the past decade, energy-efficiency has been an important system design issue in both hardware and software managements. For mobile applications with critical missions, both energy consumption reduction and timing guarantee have to be provided by system engineers to extend operation duration and maintain system stability. This research explores real-time systems composed of homogeneous multiple processors with the capability of dynamic voltage scaling (DVS), in which a given task can be rejected with a specified value of rejection penalty. The objective is to minimize the summation of the total rejection penalty for the tasks that are not completed in time and the energy consumption of the system. This study provides analysis to show that there does not exist any polynomial-time approximation algorithm for the studied problem, unless P = NP. Moreover, we propose algorithms for systems with ideal and non-ideal DVS processors. The capability of the proposed algorithms is provided with extensive evaluations. The evaluation results reveal that our proposed algorithms could derive effective solutions of the energy-efficient scheduling problem with task rejection considerations.