Algorithm and implementation of the K-best sphere decoding for MIMO detection
IEEE Journal on Selected Areas in Communications
Novel energy-efficient scalable soft-output SSFE MIMO detector architectures
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Low-complexity high throughput VLSI architecture of soft-output ML MIMO detector
Proceedings of the Conference on Design, Automation and Test in Europe
A scalable VLSI architecture for soft-input soft-output depth-first sphere decoding
IEEE Transactions on Circuits and Systems II: Express Briefs
Small-area and low-energy K-best MIMO detector using relaxed tree expansion and early forwarding
IEEE Transactions on Circuits and Systems Part I: Regular Papers
A radius adaptive K-Best decoder with early termination: algorithm and VLSI architecture
IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special section on 2009 IEEE custom integrated circuits conference
Exploration of Soft-Output MIMO Detector Implementations on Massive Parallel Processors
Journal of Signal Processing Systems
VLSI Design - Special issue on Flexible Radio Design: Trends and Challenges in Digital Baseband Implementation
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Energy-efficient realization of soft-output signal detection is of great importance in emerging high-speed multiple-input multiple-output (MIMO) wireless communication systems. This paper presents three algorithm-level complexity-reduction techniques for soft-output detector design to achieve significant energy savings. To demonstrate their effectiveness, we designed a soft-output detector for 4-4 MIMO with 64-QAM using 65nm CMOS technology. While achieving near-optimum detection performance, the detector can support over 100Mbps throughput with only 0.24mm2 silicon area and 11mw power, leading to a -10 improvement over the state of the art.