High-performance multi-queue buffers for VLSI communications switches
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
High-speed switch scheduling for local-area networks
ACM Transactions on Computer Systems (TOCS)
Two-dimensional round-robin schedulers for packet switches with multiple input queues
IEEE/ACM Transactions on Networking (TON)
Bipartite graphs and their applications
Bipartite graphs and their applications
The iSLIP scheduling algorithm for input-queued switches
IEEE/ACM Transactions on Networking (TON)
Symmetric Crossbar Arbiters for VLSI Communication Switches
IEEE Transactions on Parallel and Distributed Systems
A simple algorithm for edge-coloring bipartite multigraphs
Information Processing Letters
Achieving 100% throughput in an input-queued switch
INFOCOM'96 Proceedings of the Fifteenth annual joint conference of the IEEE computer and communications societies conference on The conference on computer communications - Volume 1
Load balanced Birkhoff-von Neumann switches, part I: one-stage buffering
Computer Communications
WASPNET: a wavelength switched packet network
IEEE Communications Magazine
Wavelength switching components for future photonic networks
IEEE Communications Magazine
The European IST project DAVID: a viable approach toward optical packet switching
IEEE Journal on Selected Areas in Communications
Towards Digital Optical Networks
Performance Issues in Optical Burst/Packet Switching
Towards Digital Optical Networks
PI-OBS: a parallel iterative optical burst scheduler for OBS networks
HPSR'09 Proceedings of the 15th international conference on High Performance Switching and Routing
Enhanced parallel iterative schedulers for IBWR optical packet switches
ONDM'07 Proceedings of the 11th international IFIP TC6 conference on Optical network design and modeling
Review: A parallel iterative scheduler for asynchronous Optical Packet Switching networks
Optical Switching and Networking
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The input-buffered wavelength-routed (IBWR) switch is a promising switching architecture for slotted optical packet switching (OPS) networks. The benefits of the IBWR fabric are a better scalability and lower hardware cost, when compared to output buffered OPS proposals. A previous work characterized the scheduling problem of this architecture as a type of matching problem in bipartite graphs. This characterization establishes an interesting relation between the IBWR scheduling and the scheduling of electronic virtual output queuing switches. In this paper, this relation is further explored, for the design of feasible IBWR scheduling algorithms, in terms of hardware implementation and execution time. As a result, the parallel desynchronized block matching (PDBM) algorithm is proposed. The evaluation results presented reveal that IBWR switch performance using the PDBM algorithm is close to the performance bound given by OPS output buffered architectures. The performance gap is especially small for dense wavelength division multiplexing (DWDM) architectures.