A retargetable instruction reorganizer

  • Authors:
  • Jack W. Davidson

  • Affiliations:
  • Univ. of Virginia

  • Venue:
  • SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
  • Year:
  • 1986

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Abstract

Extant peephole optimizers can perform many optimizations that are handled by higher-level optimizers. This paper describes a retargetable instruction reorganizer that performs targeting and evaluation order determination by applying a well known algorithm for optimal code generation for expressions to object code. By applying the algorithm to object code after code generation and optimization, a phase ordering problem often encountered by higher-level optimizers is avoided. It minimizes the number of registers and temporaries required to compile expressions by rearranging machine instructions. For some machines, this can result in smaller and faster programs. By generalizing its operation, the reorganizer can also be used to reorder instructions to avoid delays in pipelined machines. For one pipelined machine, it has provided a 5 to 10 percent improvement in the execution speed of benchmark programs.