ACM Transactions on Computer Systems (TOCS)
Performance Estimation for Real-Time Distributed Embedded Systems
IEEE Transactions on Parallel and Distributed Systems
Probabilistic application modeling for system-level perfromance analysis
Proceedings of the conference on Design, automation and test in Europe
Allocation and scheduling of conditional task graph in hardware/software co-synthesis
Proceedings of the conference on Design, automation and test in Europe
Hardware Design and Petri Nets
Hardware Design and Petri Nets
Worst-case performance analysis of parallel, communicating software processes
Proceedings of the tenth international symposium on Hardware/software codesign
Compositional Analysis of Expected Delays in Networks of Probabilistic I/O Automata
LICS '98 Proceedings of the 13th Annual IEEE Symposium on Logic in Computer Science
WCET Analysis of Probabilistic Hard Real-Time Systems
RTSS '02 Proceedings of the 23rd IEEE Real-Time Systems Symposium
Model checking stochastic automata
ACM Transactions on Computational Logic (TOCL)
Quantitative Characterization of Event Streams in Analysis of Hard Real-Time Applications
RTAS '04 Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium
A General Framework for Analysing System Properties in Platform-Based Embedded System Designs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Schedulability analysis of applications with stochastic task execution times
ACM Transactions on Embedded Computing Systems (TECS)
Efficient Feasibility Analysis for Real-Time Systems with EDF Scheduling
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Automatic scenario detection for improved WCET estimation
Proceedings of the 42nd annual Design Automation Conference
Analysis and optimization of distributed real-time embedded systems
Proceedings of the 41st annual Design Automation Conference
ECRTS '06 Proceedings of the 18th Euromicro Conference on Real-Time Systems
Integrated analysis of communicating tasks in MPSoCs
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Control-Flow Aware Communication and Conflict Analysis of Parallel Processes
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
High-performance timing simulation of embedded software
Proceedings of the 45th annual Design Automation Conference
White box performance analysis considering static non-preemptive software scheduling
Proceedings of the Conference on Design, Automation and Test in Europe
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We present a novel hybrid approach for performance analysis of a system design. Unlike other approaches in this area, in this paper we do not focus on the determination of pessimistic best-case and worst-case quantities of system properties. Our proposed analysis methodology determines qualitative numbers between best-case and worst-case of system properties and quantifies them with probabilities. For this issue, we combine local coarse-grained profiling and formal system-level analysis models in a hybrid approach for an early quantitative determination of qualitative system properties. Our approach considers the control-flow of communicating processes and the impact of blocking communication instances on the temporal behavior of the entire system during formal analysis. This can be used for determining the global system performance. The application of our new methodology leads to an inclusion of probabilities concerning system properties and allows an early performance risk estimation of a design with regard to predefined system requirements and constraints.