Modular logic built-in self-test for IP cores
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Planar High Performance Ring Generators
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
High Performance Dense Ring Generators
IEEE Transactions on Computers
Phase-Shift Analysis of Linear Feedback Shift Register Structures Generating Pseudorandom Sequences
IEEE Transactions on Computers
Pseudorandom Arrays for Built-In Tests
IEEE Transactions on Computers
Parallel Generation of l-Sequences
SETA '08 Proceedings of the 5th international conference on Sequences and Their Applications
Digital calibration of nonlinear memory errors in sigma-delta modulators
IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special section on 2009 IEEE custom integrated circuits conference
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Some new algorithms are presented for efficiently generating pseudorandom noise both in hardware and software. In software, a new word of pseudorandom bits can be generated about every 12 machine cycles, and hardware implementations can generate pseudo Gaussian noise with bandwith of 20 MHz or more. The algorithms generate binary maximal-length linear recursive sequencies of high degree and with many nonzero terms. The ability to efficiently implement high-degree recursions is important because the number of consecutive bits which can be guaranteed to be both linearly and statistically independent is equal to the degree of the recursion. The implementations are by interconnection of several short shift registers in a linear manner in such a way that different widely spaced phase shifts of the same p-n sequence appear in the stages of the several registers. Some specific algorithms have been subjected to extensive statistical evaluation, with no evidence found to distinguish the sequences from purely random binary sequences.