ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Efficient Rectilinear Steiner Tree Construction with Rectilinear Blockages
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Circuit-simulated obstacle-aware Steiner routing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Improving FPGA routability using network coding
Proceedings of the 18th ACM Great Lakes symposium on VLSI
A full-scale solution to the rectilinear obstacle-avoiding Steiner problem
Integration, the VLSI Journal
Lee-TM: A Non-trivial Benchmark Suite for Transactional Memory
ICA3PP '08 Proceedings of the 8th international conference on Algorithms and Architectures for Parallel Processing
A generalization of Dijkstra's shortest path algorithm with applications to VLSI routing
Journal of Discrete Algorithms
Some Variations of Lee's Algorithm
IEEE Transactions on Computers
Correction to ``The Lee Path Connection Algorithm''
IEEE Transactions on Computers
Effect of serialized routing resources on the implementation area of datapath circuits on FPGAS
WSEAS Transactions on Computers
EvoCOP'10 Proceedings of the 10th European conference on Evolutionary Computation in Combinatorial Optimization
| Hi-index | 14.99 |
The Lee path connection algorithm is probably the most widely used method for finding wire paths on printed circuit boards. It is shown that the original claim of generality for the path cost function is incorrect, and a restriction, called the pathconsistency property, is introduced. The Lee algorithm holds for those path cost functions having this property. Codings for the cells of the grid are proposed which will allow the correct operation of the algorithm under the most general path cost function, using the minimum number of states possible, six states per cell. Then methods for reducing the number of calculations by increasing the number of states are presented.