Transactional memory: architectural support for lock-free data structures
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Proceedings of the fourteenth annual ACM symposium on Principles of distributed computing
Software transactional memory for dynamic-sized data structures
Proceedings of the twenty-second annual symposium on Principles of distributed computing
Advanced contention management for dynamic software transactional memory
Proceedings of the twenty-fourth annual ACM symposium on Principles of distributed computing
Toward a theory of transactional contention managers
Proceedings of the twenty-fourth annual ACM symposium on Principles of distributed computing
Queue - Multiprocessors
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming
A flexible framework for implementing software transactional memory
Proceedings of the 21st annual ACM SIGPLAN conference on Object-oriented programming systems, languages, and applications
An effective hybrid transactional memory system with strong isolation guarantees
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STMBench7: a benchmark for software transactional memory
Proceedings of the 2nd ACM SIGOPS/EuroSys European Conference on Computer Systems 2007
A Study of a Transactional Parallel Routing Algorithm
PACT '07 Proceedings of the 16th International Conference on Parallel Architecture and Compilation Techniques
The Lee Path Connection Algorithm
IEEE Transactions on Computers
DISC'06 Proceedings of the 20th international conference on Distributed Computing
A lazy snapshot algorithm with eager validation
DISC'06 Proceedings of the 20th international conference on Distributed Computing
Advanced Concurrency Control for Transactional Memory Using Transaction Commit Rate
Euro-Par '08 Proceedings of the 14th international Euro-Par conference on Parallel Processing
Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering
HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
Extensible transactional memory testbed
Journal of Parallel and Distributed Computing
Scalable object-aware hardware transactional memory
EuroPar'10 Proceedings of the 16th international Euro-Par conference on Parallel processing: Part I
RMS-TM: a comprehensive benchmark suite for transactional memory systems
Proceedings of the 2nd ACM/SPEC International Conference on Performance engineering
Robust adaptation to available parallelism in transactional memory applications
Transactions on high-performance embedded architectures and compilers III
A study of transactional memory vs. locks in practice
Proceedings of the twenty-third annual ACM symposium on Parallelism in algorithms and architectures
Asynchronous lease-based replication of software transactional memory
Proceedings of the ACM/IFIP/USENIX 11th International Conference on Middleware
Parallelizing a real-time physics engine using transactional memory
Euro-Par'11 Proceedings of the 17th international conference on Parallel processing - Volume Part II
STM with transparent API considered harmful
ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part I
A transactional memory with automatic performance tuning
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
ACM SIGOPS Operating Systems Review
An integrated pseudo-associativity and relaxed-order approach to hardware transactional memory
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Restricted admission control in view-oriented transactional memory
The Journal of Supercomputing
Transactionalizing legacy code: an experience report using GCC and Memcached
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
Boosting timestamp-based transactional memory by exploiting hardware cycle counters
ACM Transactions on Architecture and Code Optimization (TACO)
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Transactional Memory (TM) is a concurrent programming paradigm that aims to make concurrent programming easier than fine-grain locking, whilst providing similar performance and scalability. Several TM systems have been made available for research purposes. However, there is a lack of a wide range of non-trivial benchmarks with which to thoroughly evaluate these TM systems.This paper introduces Lee-TM, a non-trivial and realistic TM benchmark suite based on Lee's routing algorithm. The benchmark suite provides sequential, lock-based, and transactional implementations to enable direct performance comparison. Lee's routing algorithm has several of the desirable properties of a non-trivial TM benchmark, such as large amounts of parallelism, complex contention characteristics, and a wide range of transaction durations and lengths. A sample evaluation shows unfavourable transactional performance and scalability compared to lock-based execution, in contrast to much of the published TM evaluations, and highlights the need for non-trivial TM benchmarks.