Parallel Program Schemata and Maximal Parallelism II: Construction of Closures
Journal of the ACM (JACM)
Communications of the ACM
The next 700 programming languages
Communications of the ACM
Recursive functions of symbolic expressions and their computation by machine, Part I
Communications of the ACM
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
A preliminary architecture for a basic data-flow processor
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
Proceedings of the International Sympoisum on Theoretical Programming
First version of a data flow procedure language
Programming Symposium, Proceedings Colloque sur la Programmation
The architecture and system method of DDM1: A recursively structured Data Driven Machine
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Indeterminacy, monitors, and dataflow
SOSP '77 Proceedings of the sixth ACM symposium on Operating systems principles
A data flow language for operating systems programming
Proceeding of ACM SIGPLAN - SIGOPS interface meeting on Programming languages - operating systems
A GRAPH MODEL FOR PARALLEL COMPUTATIONS
A GRAPH MODEL FOR PARALLEL COMPUTATIONS
Protection and security in a dataflow system.
Protection and security in a dataflow system.
Exception handling and recovery in applicative systems
Exception handling and recovery in applicative systems
A dataflow architecture with improved asymptotic performance
A dataflow architecture with improved asymptotic performance
IEEE Transactions on Computers
Closure properties of interconnections of determinate systems
Record of the Project MAC conference on concurrent systems and parallel computation
DFSP: A Data Flow Signal Processor
IEEE Transactions on Computers
Structure handling in data-flow systems
IEEE Transactions on Computers - The MIT Press scientific computation series
The effect of operation scheduling on the performance of a data flow computer
IEEE Transactions on Computers
Design and Performance Evaluation of EXMAN: An EXtended MANchester Data Flow Computer
IEEE Transactions on Computers
Wavefront Array Processor: Language, Architecture, and Applications
IEEE Transactions on Computers
Packet Switching Networks for Multiprocessors and Data Flow Computers
IEEE Transactions on Computers
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Our goal is to devise a computer comprising large numbers of cooperating processors (LSI). In doing so we reject the sequential and memory cell semantics of the von Neumann model, and instead adopt the asynchronous and functional semantics of dataflow. We briefly describe the high-level dataflow programming language Id, as well as an initial design for a dataflow machine and the results of detailed deterministic simulation experiments on a part of that machine. For example, we show that a dataflow machine can automatically unfold the nested loops of n X n matrix multiply to reduce its time complexity from 0(n3) to 0(n) so long as sufficient processors and communication capacity is available. Similarly, quicksort executes with average 0(n) time demanding 0(n) processors. Also discussed are the use of processor and communication time complexity analysis and "flow analysis," as aids in understanding the behavior of the machine.