Experience Using Multiprocessor Systems—A Status Report
ACM Computing Surveys (CSUR)
Data-Driven and Demand-Driven Computer Architecture
ACM Computing Surveys (CSUR)
Supercomputers - Design and Applications
Supercomputers - Design and Applications
Computer Architecture and Parallel Processing
Computer Architecture and Parallel Processing
Interconnection Networks for Parallel and Distributed Processing
Interconnection Networks for Parallel and Distributed Processing
Performance measurements on HEP - a pipelined MIMD computer
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
Switching strategies in a class of packet switching networks
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
A critique of multiprocessing von Neumann style
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
A critique of multiprocessing von Neumann style
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
Building blocks for data flow prototypes
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
Packet switching in banyan networks
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
Communication nets; stochastic message flow and delay
Communication nets; stochastic message flow and delay
Parallel Processing with the Perfect Shuffle
IEEE Transactions on Computers
The Binary Tree as an Interconnection Network: Applications to Multiprocessor Systems and VLSI
IEEE Transactions on Computers
A Cluster Structure as an Interconnection Network for Large Multimicrocomputer Systems
IEEE Transactions on Computers
Analysis and Simulation of Buffered Delta Networks
IEEE Transactions on Computers
The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems
IEEE Transactions on Computers
Graph Theoretical Analysis and Design of Multistage Interconnection Networks
IEEE Transactions on Computers
A Uniform Representation of Single-and Multistage Interconnection Networks Used in SIMD Machines
IEEE Transactions on Computers
The Reverse-Exchange Interconnection Network
IEEE Transactions on Computers
Performance of Processor-Memory Interconnections for Multiprocessors
IEEE Transactions on Computers
Performance of a Simulated Dataflow Computer
IEEE Transactions on Computers
IEEE Transactions on Computers
Design and Performance of Generalized Interconnection Networks
IEEE Transactions on Computers
The Performance of Multistage Interconnection Networks for Multiprocessors
IEEE Transactions on Computers
A Class of Redundant Path Multistage Interconnection Networks
IEEE Transactions on Computers
Generalized Connection Networks for Parallel Processor Intercommunication
IEEE Transactions on Computers
A Survey of Interconnection Networks
Computer
Sorting networks and their applications
AFIPS '68 (Spring) Proceedings of the April 30--May 2, 1968, spring joint computer conference
The Load-Sharing Banyan Network
IEEE Transactions on Computers
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Most packet switched multistage networks have been proposed to use a unique path between any source and destination. We propose to add a few extra stages to create multiple paths between any source and destination. Connection principles of such multipath networks for packet switching are presented. Performance of such networks is analyzed for possible use in multiprocessor systems or in data flow computers.