Journal of the ACM (JACM)
CONPAR '81 Proceedings of the Conference on Analysing Problem Classes and Programming for Parallel Computing
Toward a dataflow/von Neumann hybrid architecture
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
System architecture of parallel processing system -Harry-
ICS '88 Proceedings of the 2nd international conference on Supercomputing
Efficient synchronization primitives for large-scale cache-coherent multiprocessors
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
Combining produce and consume operations in a pipelined shared memory multiprocessor
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
Run-Time Parallelization and Scheduling of Loops
IEEE Transactions on Computers
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
Low contention load balancing on large-scale multiprocessors
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
Dynamic switching of coherent cache protocols and its effects on Doacross loops
ICS '93 Proceedings of the 7th international conference on Supercomputing
POPL '95 Proceedings of the 22nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Multithreading with Distributed Functional Units
IEEE Transactions on Computers
PLUS: a distributed shared-memory system
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
(SM)2-II: a new version of the sparse matrix solving machine
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Analysis and simulation of multiplexed single-bus networks with and without buffering
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Asynchrony in parallel computing: from dataflow to multithreading
Progress in computer research
Asynchrony in parallel computing: from dataflow to multithreading
Progress in computer research
Branch Target Buffer Design and Optimization
IEEE Transactions on Computers
Two Fundamental Limits on Dataflow Multiprocessing
PACT '93 Proceedings of the IFIP WG10.3. Working Conference on Architectures and Compilation Techniques for Fine and Medium Grain Parallelism
Connection principles for multipath, packet switching networks
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Packet Switching Networks for Multiprocessors and Data Flow Computers
IEEE Transactions on Computers
Architectural Support for Fair Reader-Writer Locking
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
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A pipelined implementation of MIMD operation is embodied in the HEP computer. This architectural concept should be carefully evaluated now that such a computer is available commercially. This paper studies the degree of utilization of pipelines in the MIMD environment. A detailed analysis of two extreme cases indicates that pipeline utilization is quite high. Although no direct comparisons are made with other computers, the low pipeline idle time in this machine indicates that this architectural technique may be more beneficial in an MIMD machine than in either SISD or SIMD machines.