Analysis and Simulation of Buffered Delta Networks
IEEE Transactions on Computers
The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems
IEEE Transactions on Computers
The Indirect Binary n-Cube Microprocessor Array
IEEE Transactions on Computers
On a Class of Multistage Interconnection Networks
IEEE Transactions on Computers
Fault-Diagnosis for a Class of Multistage Interconnection Networks
IEEE Transactions on Computers
Performance of Processor-Memory Interconnections for Multiprocessors
IEEE Transactions on Computers
Packet Switching Networks for Multiprocessors and Data Flow Computers
IEEE Transactions on Computers
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers
A Class of Redundant Path Multistage Interconnection Networks
IEEE Transactions on Computers
A Survey of Interconnection Networks
Computer
Realizing Fault-Tolerant Interconnection Networks Via Chaining
IEEE Transactions on Computers - Fault-Tolerant Computing
Design and Performance Analysis of Load-Distributing Fault-Tolerant Network
IEEE Transactions on Computers
IEEE/ACM Transactions on Networking (TON)
Switch fabric design for high performance IP routers: a survey
Journal of Systems Architecture: the EUROMICRO Journal
| Hi-index | 14.98 |
Banyan networks, as well as many other self-routing networks, have a simple and regular topology, and can be easily diagnosed and maintained. However, like many other self- routing networks, Banyan networks have only one path between each input and output pair. Failures of a single link or node will make many paths unavailable, and certain traffic patterns can cause severe congestion in the networks.