Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
IEEE Transactions on Computers
Examining Smart-Card Security under the Threat of Power Analysis Attacks
IEEE Transactions on Computers
Resistance against Differential Power Analysis for Elliptic Curve Cryptosystems
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Energy-aware design techniques for differential power analysis protection
Proceedings of the 40th annual Design Automation Conference
Masking the Energy Behavior of DES Encryption
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
An On-Chip Signal Suppression Countermeasure to Power Analysis Attacks
IEEE Transactions on Dependable and Secure Computing
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Attacks based on a differential power analysis (DPA) are a main threat when designing cryptographic functions for implementation on chip-cards. In this paper, a dynamic and differential look-up table (LUT) is presented and evaluated on a case study simulation. The proposed circuit shows a power consumption independent from the input data and can be employed to implement combinatorial functions in cryptographic processors when a high resistance against tampering is required. A typical application is the design of non-linear functions (e.g. substitution boxes) since protecting them with less expensive countermeasures (e.g. random masking) implies a significant overhead. In the adopted case study, a 1.02% spread in the power consumption has been obtained when parasitic capacitances are taken into account. Moreover, a comparison with a static CMOS implementation shows an acceptable overhead in terms of area and power consumption.