Next-Generation Design and EDA Challenges: Small Physics, Big Systems, and Tall Tool-Chains

Statistical analysis of on-chip power grid networks by variational extended truncated balanced realization method

Proceedings of the 2009 Asia and South Pacific Design Automation Conference

Statistical analysis of large on-chip power grid networks by variational reduction scheme

Integration, the VLSI Journal

Performance bound analysis of analog circuits considering process variations

Proceedings of the 48th Design Automation Conference

Statistical extraction and modeling of inductance considering spatial correlation

Analog Integrated Circuits and Signal Processing

Parallel statistical analysis of analog circuits by GPU-accelerated graph-based approach

DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe

Performance bound analysis of analog circuits in frequency- and time-domain considering process variations

ACM Transactions on Design Automation of Electronic Systems (TODAES)