Differential Fault Analysis of Secret Key Cryptosystems
CRYPTO '97 Proceedings of the 17th Annual International Cryptology Conference on Advances in Cryptology
The Montgomery Powering Ladder
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Optical Fault Induction Attacks
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Fault Attacks on RSA with CRT: Concrete Results and Practical Countermeasures
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
ASAP '02 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
Weight-Based Codes and Their Application to Concurrent Error Detection of Multilevel Circuits
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
WHICH CONCURRENT ERROR DETECTION SCHEME TO CHOOSE?
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Towards fault-tolerant cryptographic computations over finite fields
ACM Transactions on Embedded Computing Systems (TECS)
Tamper resistance: a cautionary note
WOEC'96 Proceedings of the 2nd conference on Proceedings of the Second USENIX Workshop on Electronic Commerce - Volume 2
The Architectural Elements of a Symmetric Fault-Tolerant Multiprocessor
IEEE Transactions on Computers
On the importance of checking cryptographic protocols for faults
EUROCRYPT'97 Proceedings of the 16th annual international conference on Theory and application of cryptographic techniques
Robust finite field arithmetic for fault-tolerant public-key cryptography
FDTC'06 Proceedings of the Third international conference on Fault Diagnosis and Tolerance in Cryptography
Highly Regular Right-to-Left Algorithms for Scalar Multiplication
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Novel PUF-Based Error Detection Methods in Finite State Machines
Information Security and Cryptology --- ICISC 2008
Non-linear Error Detection for Finite State Machines
Information Security Applications
An emerging threat: eve meets a robot
INTRUST'10 Proceedings of the Second international conference on Trusted Systems
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In the relatively young field of fault tolerant cryptography the main research effort has focused exclusively on the protection of the data-path of cryptographic circuits. To date, however, we have not found any work that aims at protecting the control logic of these circuits against fault attacks, which thus remained as Achilles' proverbial heel. Motivated by an example of a hypothetical attack on an otherwise protected modular exponentiation engine we set out to close this remaining gap. In this paper we present guidelines for the design of t-fault resilient sequential control logic based on Error Detecting Codes (EDC). Our method allows to trade area overhead against fault resilience, and has the added benefit that the detection circuit does not add to the critical path.