Galileo: a tool built from mass-market applications
Proceedings of the 22nd international conference on Software engineering
Future Challenges in VLSI Design
ISVLSI '03 Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03)
NANOPRISM: a tool for evaluating granularity vs. reliability trade-offs in nano architectures
Proceedings of the 14th ACM Great Lakes symposium on VLSI
An Accurate Probalistic Model for Error Detection
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Gate Failures Effectively Shape Multiplexing
DFT '06 Proceedings of the 21st IEEE International Symposium on on Defect and Fault-Tolerance in VLSI Systems
Lifetime reliability aware microprocessors
Lifetime reliability aware microprocessors
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This paper summarizes a strategy for development of an EDA (Electronic Design Automation) tool which is aimed to support the design of future nano-circuits. The problem with the existing EDA tools is that they do not explicitly consider reliability as a design criterion. Most of the tools that do consider reliability are not intended for the nanoelectronic industry and are very limited in the types of failure models they can assess. Moreover, current indications show that moving towards nano-scale will significantly increase the failure rates. It follows that an improved EDA tool which would efficiently assess reliability (besides speed, power, area, etc.) is becoming a necessity. In this paper we detail a strategy and its methods that could ultimately lead to an EDA tool for realistic reliability evaluation of nano-circuits.