Real-time object-oriented modeling
Real-time object-oriented modeling
Object-oriented application frameworks
Communications of the ACM
Doing hard time: developing real-time systems with UML, objects, frameworks, and patterns
Doing hard time: developing real-time systems with UML, objects, frameworks, and patterns
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Model checking
Embedded software verification in hardware-software codesign
Journal of Systems Architecture: the EUROMICRO Journal
Efficient and User-Friendly Verification
IEEE Transactions on Computers
Component Software: Beyond Object-Oriented Programming
Component Software: Beyond Object-Oriented Programming
Practical statecharts in C/C++: Quantum programming for embedded systems
Practical statecharts in C/C++: Quantum programming for embedded systems
Decomposing refinement proofs using assume-guarantee reasoning
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Assume-Guarantee Supervisor for Concurrent Systems
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Model Checking - Timed UML State Machines and Collaborations
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Specification and verification of concurrent systems in CESAR
Proceedings of the 5th Colloquium on International Symposium on Programming
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
CHDL '93 Proceedings of the 11th IFIP WG10.2 International Conference sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC on Computer Hardware Description Languages and their Applications
Extended quasi-static scheduling for formal synthesis and code generation of embedded software
Proceedings of the tenth international symposium on Hardware/software codesign
Time weaver: a software-through-models framework for embedded real-time systems
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
RTFrame: An Object-Oriented Application Framework for Real-Time Applications
TOOLS '98 Proceedings of the Technology of Object-Oriented Languages and Systems
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Modeling real-time distributed software systems
WPDRTS '96 Proceedings of the 4th International Workshop on Parallel and Distributed Real-Time Systems
Synthesis of real-time embedded software with local and global deadlines
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Transforming Structural Model to Runtime Model of Embedded Software with Real-Time Constraints
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Application of automated revision for UML models: a case study
ICDCN'12 Proceedings of the 13th international conference on Distributed Computing and Networking
Automatic generation of provably correct embedded systems
ICFEM'12 Proceedings of the 14th international conference on Formal Engineering Methods: formal methods and software engineering
MR4UM: A framework for adding fault tolerance to UML state diagrams
Theoretical Computer Science
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Currently available application frameworks that target the automatic design of real-time embedded software are poor in integrating functional and non-functional requirements for mobile and ubiquitous systems. In this work, we present the internal architecture and design flow of a newly proposed framework called Verifiable Embedded Real-Time Application Framework (VERTAF), which integrates three techniques namely software component-based reuse, formal synthesis, and formal verification. Component reuse is based on a formal unified modeling language (UML) real-time embedded object model. Formal synthesis employs quasi-static and quasi-dynamic scheduling with multi-layer portable efficient code generation, which can output either real-time operating systems (RTOS)-specific application code or automatically generated real-time executive with application code. Formal verification integrates a model checker kernel from state graph manipulators (SGM), by adapting it for embedded software. The proposed architecture for VERTAF is component-based which allows plug-and-play for the scheduler and the verifier. The architecture is also easily extensible because reusable hardware and software design components can be added. Application examples developed using VERTAF demonstrate significantly reduced relative design effort as compared to design without VERTAF, which also shows how high-level reuse of software components combined with automatic synthesis and verification increases design productivity.