IBM Journal of Research and Development - Special issue: terrestrial cosmic rays and soft errors
Design and Evaluation of System-Level Checks for On-Line Control Flow Error Detection
IEEE Transactions on Parallel and Distributed Systems
An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits
Journal of Electronic Testing: Theory and Applications
Soft-Error Detection through Software Fault-Tolerance Techniques
DFT '99 Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems
Reliable System Co-Design: The FIR Case Study
DFT '04 Proceedings of the Defect and Fault Tolerance in VLSI Systems, 19th IEEE International Symposium
Reliable System Specification for Self-Checking Data-Paths
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
A model of soft error e.ects in generic IP processors
DFT '05 Proceedings of the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
An Integrated Approach for Increasing the Soft-Error Detection Capabilities in SoCs processors
DFT '05 Proceedings of the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Combined software and hardware techniques for the design of reliable IP processors
DFT '06 Proceedings of the 21st IEEE International Symposium on on Defect and Fault-Tolerance in VLSI Systems
AN-Encoding Compiler: Building Safety-Critical Systems with Commodity Hardware
SAFECOMP '09 Proceedings of the 28th International Conference on Computer Safety, Reliability, and Security
Parallelizing Software-Implemented Error Detection
SEUS '09 Proceedings of the 7th IFIP WG 10.2 International Workshop on Software Technologies for Embedded and Ubiquitous Systems
Hardware/software optimization of error detection implementation for real-time embedded systems
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
ANB- and ANBDmem-encoding: detecting hardware errors in software
SAFECOMP'10 Proceedings of the 29th international conference on Computer safety, reliability, and security
Performance optimization of error detection based on speculative reconfiguration
Proceedings of the 48th Design Automation Conference
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In the recent years both software and hardware techniques have been adopted to carry out reliable designs, aimed at autonomously detecting the occurrence of faults, to allow discarding erroneous data and possibly performing the recovery of the system. The aim of this paper is the introduction of a combined use of software and hardware approaches to achieve a complete fault coverage in generic IP processors, with respect to SEU faults. Software techniques are preferably adopted to reduce the necessity and costs of modifying the processor architecture; since a complete fault coverage cannot be achieved, partial hardware redundancy techniques are then introduced to deal with the remaining, not covered, faults. The paper presents the methodological approach adopted to achieve the complete fault coverage, the proposed resulting architecture, and the experimental results gathered from the analysis of the fault injection campaigns.