DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Electron-beam technology for open/short testing of multichip substrates
IBM Journal of Research and Development
An optimal probe testing algorithm for the connectivity verification of MCM substrates
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
Proceedings of the conference on Design, automation and test in Europe
System-in-package (SIP): challenges and opportunities
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Placement of Substrate Contacts to Minimize Substrate Noise in Mixed-Signal Integrated Circuits
Analog Integrated Circuits and Signal Processing
A Novel Low-Cost Approach to MCM Interconnect Test
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Test Resource Optimization for Multi-Site Testing of SOCs Under ATE Memory Depth Constraints
ITC '02 Proceedings of the 2002 IEEE International Test Conference
Test Economics for Multi-site Test with Modern Cost Reduction Techniques
VTS '02 Proceedings of the 20th IEEE VLSI Test Symposium
Optimized wafer-probe and assembled package test design for analog circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Single-probe traversal optimization for testing of MCM substrate interconnections
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Expert Systems with Applications: An International Journal
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This paper presents a novel method that utilizes multi-site and multi-probe capabilities of an ATE for testing of pre-assembly MCM substrates. Testing multiple SUTs (substrates under test) simultaneously can improve the efficiency of the probes in an ATE and considerably reduce the total test time. An analytical model that predicts very accurately the testing time of a SUT batch is proposed. Based on this model, the optimal multi-site testing configuration as corresponding to the batch size can be established. Simulation results for an ATE with 12 flying-probes as an example of a commercially available tester are provided; for this ATE the proposed method achieves a reduction of 54.66% in test time over a single-site method (both at complete coverage of the modeled faults).