Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts

Authors:
Swarup Mohalik;A. C. Rajeev;Manoj G. Dixit;S. Ramesh;P. Vijay Suman;Paritosh K. Pandya;Shengbing Jiang
Affiliations:
General Motors India Science Lab, Bangalore, India;General Motors India Science Lab, Bangalore, India;General Motors India Science Lab, Bangalore, India;General Motors India Science Lab, Bangalore, India;Tata Institute of Fundamental Research, Mumbai, India;Tata Institute of Fundamental Research, Mumbai, India;General Motors R&D, Warren, MI
Venue:
Proceedings of the 45th annual Design Automation Conference
Year:
2008

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Abstract

End-to-end latency of messages is an important design parameter that needs to be within specified bounds for the correct functioning of distributed real-time control systems. In this paper we give a formal definition of end-to-end latency, and use this as the basis for checking whether a stipulated deadline is violated within a bounded time. For unbounded verification, we model the system as a set of communicating Timed Automata, and perform reachability analysis. The proposed method takes into account the drift of clocks which is shown to affect the latency appreciably. The method has been tested on a medium sized automotive example.