A Machine-Oriented Logic Based on the Resolution Principle
Journal of the ACM (JACM)
An algorithm for bi-decomposition of logic functions
Proceedings of the 38th annual Design Automation Conference
Functional Decomposition with Application to FPGA Synthesis
Functional Decomposition with Application to FPGA Synthesis
A new decomposition method for multilevel circuit design
EURO-DAC '91 Proceedings of the conference on European design automation
AMUSE: a minimally-unsatisfiable subformula extractor
Proceedings of the 41st annual Design Automation Conference
Scalable exploration of functional dependency by interpolation and incremental SAT solving
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Timing-driven logic bi-decomposition
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
To SAT or not to SAT: Ashenhurst decomposition in a large scale
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Quantifier Elimination via Functional Composition
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Interpolant generation without constructing resolution graph
Proceedings of the 2009 International Conference on Computer-Aided Design
Interpolating functions from large Boolean relations
Proceedings of the 2009 International Conference on Computer-Aided Design
Sequential logic synthesis using symbolic bi-decomposition
Proceedings of the Conference on Design, Automation and Test in Europe
Decomposition of systems of Boolean functions determined by binary decision diagrams
Journal of Computer and Systems Sciences International
Accelerating MUS extraction with recursive model rotation
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
New & improved models for SAT-based bi-decomposition
Proceedings of the great lakes symposium on VLSI
Towards efficient MUS extraction
AI Communications - 18th RCRA International Workshop on “Experimental evaluation of algorithms for solving problems with combinatorial explosion”
A counterexample-guided interpolant generation algorithm for SAT-based model checking
Proceedings of the 50th Annual Design Automation Conference
QBF-based boolean function Bi-decomposition
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Computing interpolants without proofs
HVC'12 Proceedings of the 8th international conference on Hardware and Software: verification and testing
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Boolean function bi-decomposition is a fundamental operation in logic synthesis. A function f(X) is bi-decomposable under a variable partition XA,XB,XC on X if it can be written as h(fA(XA,XC),fB(XB, XC)) for some functions h, fA, and fB. The quality of a bi-decomposition is mainly determined by its variable partition. A preferred decomposition is disjoint, i.e. XC = ø, and balanced, i.e. |XA| ã |XB|. Finding such a good decomposition reduces communication and circuit complexity, and yields simple physical design solutions. Prior BDD-based methods may not be scalable to decompose large functions due to the memory explosion problem. Also as decomposability is checked under a fixed variable partition, searching a good or feasible partition may run through costly enumeration that requires separate and independent decomposability checkings. This paper proposes a solution to these difficulties using interpolation and incremental SAT solving. Preliminary experimental results show that the capacity of bi-decomposition can be scaled up substantially to handle large designs.