On the numerical condition of polynomials in Berstein form
Computer Aided Geometric Design
A pulse-coded communications infrastructure for neuromorphic systems
Pulsed neural networks
Stochastic Neural Computation I: Computational Elements
IEEE Transactions on Computers
Neural Networks for Pattern Recognition
Neural Networks for Pattern Recognition
Nanowire-based programmable architectures
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Fully parallel stochastic computation architecture
IEEE Transactions on Signal Processing
Module locking in biochemical synthesis
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
A reconfigurable stochastic architecture for highly reliable computing
Proceedings of the 19th ACM Great Lakes symposium on VLSI
The synthesis of combinational logic to generate probabilities
Proceedings of the 2009 International Conference on Computer-Aided Design
Proceedings of the 47th Design Automation Conference
Uniform approximation and Bernstein polynomials with coefficients in the unit interval
European Journal of Combinatorics
The synthesis of complex arithmetic computation on stochastic bit streams using sequential logic
Proceedings of the International Conference on Computer-Aided Design
Comparing the performance of stochastic simulation on GPUs and OpenMP
International Journal of Computational Science and Engineering
Survey of Stochastic Computing
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on Probabilistic Embedded Computing
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As integrated circuit technology plumbs ever greater depths in the scaling of feature sizes, maintaining the paradigm of deterministic Boolean computation is increasingly challenging. Indeed, mounting concerns over noise and uncertainty in signal values motivate a new approach: the design of stochastic logic, that is to say, digital circuitry that processes signals probabilistically, and so can cope with errors and uncertainty. In this paper, we present a general methodology for synthesizing stochastic logic for the computation of polynomial arithmetic functions, a category that is important for applications such as digital signal processing. The method is based on converting polynomials into a particular mathematical form --- Bernstein polynomials --- and then implementing the computation with stochastic logic. The resulting logic processes serial or parallel streams that are random at the bit level. In the aggregate, the computation becomes accurate, since the results depend only on the precision of the statistics. Experiments show that our method produces circuits that are highly tolerant of errors in the input stream, while the area-delay product of the circuit is comparable to that of deterministic implementations.