Efficiently scheduling runtime reconfigurations

Authors:
Javier Resano;Juan Antonio Clemente;Carlos Gonzalez;Daniel Mozos;Francky Catthoor
Affiliations:
Universidad Complutense de Madrid, Spain;Universidad Complutense de Madrid, Spain;Universidad Complutense de Madrid, Spain;Universidad Complutense de Madrid, Spain;IMEC vzw and Katholieke Universiteit Leuven, Heverlee, Belgium
Venue:
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Year:
2008

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Abstract

Due to the emergence of portable devices that must run complex dynamic applications there is a need for flexible platforms for embedded systems. Runtime reconfigurable hardware can provide this flexibility but the reconfiguration latency can significantly decrease the performance. When dealing with task graphs, runtime support that schedules the reconfigurations in advance can drastically reduce this overhead. However, executing complex scheduling heuristics at runtime may generate an excessive penalty. Hence, we have developed a hybrid design-time/runtime reconfiguration scheduling heuristic that generates its final schedule at runtime but carries out most computations at design-time. We have tested our approach in a PowerPC 405 processor embedded on a FPGA demonstrating that it generates a very small runtime penalty while providing almost as good schedules as a full runtime approach.