Comparative study of serial and parallel heuristics used to design combinational logic circuits

  • Authors:
  • Enrique Alba;Gabriel Luque;Carlos A. Coello Coello;Erika Hernández Luna

  • Affiliations:
  • Departamento de Lenguajes y Ciencias de la Computación, E.T.S.I. Informática, Málaga, Spain;Departamento de Lenguajes y Ciencias de la Computación, E.T.S.I. Informática, Málaga, Spain;Departamento de Ing. Eléctrica, CINVESTAV-IPN (Evolutionary Computation Group), Sección Computación, México, DF, Mexico;Departamento de Ing. Eléctrica, CINVESTAV-IPN (Evolutionary Computation Group), Sección Computación, México, DF, Mexico

  • Venue:
  • Optimization Methods & Software
  • Year:
  • 2007

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Abstract

In this article, we perform a comparative study of different heuristics used to design combinational logic circuits. This study mainly emphasizes the use of local search hybridized with a genetic algorithm (GA) and the impact of introducing parallelism. Our results indicate that a hybridization of a GA with a local search algorithm (simulated annealing) is beneficial and that the use of parallelism not only introduces a speedup in the algorithms compared (as expected) but also allows us to improve the quality of the solutions found.