Single stage static level shifter design for subthreshold to I/O voltage conversion

Authors:
Yi-Shiang Lin;Dennis M. Sylvester
Affiliations:
University of Michigan, Ann Arbor, MI, USA;University of Michigan, Ann Arbor, MI, USA
Venue:
Proceedings of the 13th international symposium on Low power electronics and design
Year:
2008

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Abstract

A static subthreshold to I/O voltage level shifter is proposed. The proposed circuit employs a diode-connected pull-up transistor stack and a feedback structure to alleviate the drive strength requirement on the pull-down transistors. The proposed level shifter achieves less than 6 FO4 inverter delay under process and temperature variation when converting the input from 300mV to 2.5V. Compared to a conventional DCVS design, the new design consumes 8 times less power and is 10% faster under room temperature.