Fundamentals of modern VLSI devices
Fundamentals of modern VLSI devices
Level conversion for dual-supply systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Single stage static level shifter design for subthreshold to I/O voltage conversion
Proceedings of the 13th international symposium on Low power electronics and design
Low energy level converter design for sub-Vth logics
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
A 45nm CMOS 0.35v-optimized standard cell library for ultra-low power applications
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
An energy-efficient subthreshold level converter in 130-nm CMOS
IEEE Transactions on Circuits and Systems II: Express Briefs
A subthreshold to above-threshold level shifter comprising a Wilson current mirror
IEEE Transactions on Circuits and Systems II: Express Briefs
40nm CMOS 0.35V-Optimized Standard Cell Libraries for Ultra-Low Power Applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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The large supply voltage difference between sub-threshlold core logic and I/O makes it extremely challenging to convert signals from core circuit to I/O circuit. In this paper, we propose two novel circuits, Clock Synchronizer and Reduced Swing Inverter to design dynamic and static level converters for sub-threshold logic. Circuit simulations shows that our level converters work at frequency 500Khz between 20®C and 40®C with a supply voltage of 0.25V.