Processor networks and interconnection networks without long wires (extended abstract)

Authors:
Richard Beigel;Clydel P. Kruskal
Affiliations:
Dept. of Computer Science, The Johns Hopkins University, Baltimore, MD;Dept. of Computer Science, University of Maryland, College Park, MD
Venue:
ACM SIGARCH Computer Architecture News - Symposium on parallel algorithms and architectures
Year:
1991

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Abstract

One processor network that is especially attractive for parallel processing is the Butterfly network. A very closely related interconnection network is the Bidelta (or Omega) network. It is well known how to lay out these networks with minimal area, but these layouts use long wires. We show how to lay them out with optimal area and short wires. We also introduce the Mesh-Connected Cycles network, which has optimal area (in the sense of AT2) for a broad range of running times when executing "ascend-descend" algorithms. The length of its longest wire is nearly optimal, and its layout area has very modest constants.