On the potential of asynchronous pipelined processors

Authors:
Ran Ginosar;Nick Michell
Affiliations:
Technion - Israel Institute of Technology, Haifa, Israel;University of Utah, Dept. o.f Computer Science, 3190 Merrill Engineering Building, Salt Lake City, Utah
Venue:
ACM SIGARCH Computer Architecture News
Year:
1990

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Abstract

An asynchronous version of the pipelined R3000 and DLX processors, the A3000, is being designed. Simulation was employed to investigate the potential speed-up obtainable due to the asynchronous operation. Preliminary results show up to a 64% improvement in performance.