Biased Voting: A Method for Simulating CMOS Bridging Faults in the Presence of Variable Gate Logic
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
A study of bridging defect probabilities on a Pentium (TM) 4 CPU
Proceedings of the IEEE International Test Conference 2001
On Finding Functionally Identical and Functionally Opposite Lines in Combinational Logic Circuits
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
A Comparison of Bridging Fault Simulation Methods
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Using Dummy Bridging Faults to Define a Reduced Set of Target Faults
ETS '05 Proceedings of the 10th IEEE European Symposium on Test
Combinational and sequential logic optimization by redundancy addition and removal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Robust fault models where undetectable faults imply logic redundancy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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We define a robust fault model as a model where the existence of an undetectable fault implies the existence of logic redundancy, or more generally, a suboptimality in the synthesis of the circuit. The stuck-at fault model is robust, but other fault models such as certain bridging fault models are not. A robust fault model provides a mechanism to synthesize circuits in which all the target faults are detectable and 100% fault coverage is achievable. The ability to achieve 100% fault coverage, or understand why it is not achievable, is important since the requirement to achieve high test quality translates into a requirement to achieve complete fault coverage for target faults, regardless of the metrics used to measure test quality. We discuss a robust bridging fault model and its use as part of a test generation process for a non-robust bridging fault model (a non-robust bridging fault model may have to be used in order to capture the behavior of bridging defects). We also present experimental results related to the robust bridging fault model.