ATUM: a new technique for capturing address traces using microcode
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Design and analysis of dynamic Huffman codes
Journal of the ACM (JACM)
Dynamic base register caching: a technique for reducing address bus width
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Address compression through base register caching
MICRO 23 Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture
Information content of CPU memory referencing behavior
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
Aspects of Cache Memory and Instruction
Aspects of Cache Memory and Instruction
Codes to reduce switching transients across VLSI I/O pins
ACM SIGARCH Computer Architecture News
Techniques for compressing program address traces
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
The performance advantage of applying compression to the memory system
Proceedings of the 2002 workshop on Memory system performance
Creating a wider bus using caching techniques
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
Locality-Based Online Trace Compression
IEEE Transactions on Computers
Entropy-based low power data TLB design
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Notary: Hardware techniques to enhance signatures
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
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