RTOS-centric hardware/software cosimulator for embedded system design
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
ArchC: A SystemC-Based Architecture Description Language
SBAC-PAD '04 Proceedings of the 16th Symposium on Computer Architecture and High Performance Computing
The OpenMP Source Code Repository
PDP '05 Proceedings of the 13th Euromicro Conference on Parallel, Distributed and Network-Based Processing
A Platform for Refinement of OS Services for Embedded Systems
DELTA '06 Proceedings of the Third IEEE International Workshop on Electronic Design, Test and Applications
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Computer
A smooth refinement flow for co-designing HW and SW threads
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Introducing preemptive scheduling in abstract RTOS models using result oriented modeling
Proceedings of the conference on Design, automation and test in Europe
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A real-time application design methodology for MPSoCs
Proceedings of the Conference on Design, Automation and Test in Europe
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This paper presents a novel technique for the modeling and the simulation of parallel applications for Multi-Processor Systems-on-Chip (MPSoCs). This technique consists of an application-transparent emulation of OS primitives, including task creation, scheduling, synchronization etc.; this emulation guarantees compatibility with any program compiled against the standard POSIX library, independently of the target OS. This methodology can be used to perform initial HW/SW partitioning and concurrent engineering of a given application, as it allows any software routine to be transparently emulated with SystemC modules. The proposed approach has been verified on a large set of multi-threaded benchmarks, with both POSIX Threads and OpenMP programming styles. Results show that our methodology enables (a) fast simulation of POSIX applications, (b) accurate analysis of multi-threaded applications, and (c) co-design and fast preliminary hardware-software partitioning.