Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class

Authors:
Yong Ki Lee;Herwin Chan;Ingrid Verbauwhede
Affiliations:
Electrical Engineering, University of California, Los Angeles, Los Angeles, USA 90095-1594;Electrical Engineering, University of California, Los Angeles, Los Angeles, USA 90095-1594;Electrical Engineering, University of California, Los Angeles, Los Angeles, USA 90095-1594 and Katholieke Universiteit Leuven, Leuven, Belgium
Venue:
Journal of Signal Processing Systems
Year:
2008

Citing 12
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Abstract

In this paper we propose an architecture design methodology to optimize the throughput of MD4-based hash algorithms. The proposed methodology includes an iteration bound analysis of hash algorithms, which is the theoretical delay limit, and Data Flow Graph transformations to achieve the iteration bound. We applied the methodology to some MD4-based hash algorithms such as SHA1, MD5 and RIPEMD-160. Since SHA1 is the algorithm which requires all the techniques we show, we also synthesized the transformed SHA1 algorithm in a 0.18 μm CMOS technology in order to verify its correctness and its achievement of high throughput. To the best of our knowledge, the proposed SHA1 architecture is the first to achieve the theoretical throughput optimum beating all previously published results. Though we demonstrate a limited number of examples, this design methodology can be applied to any other MD4-based hash algorithm.