Automatic defect classification for semiconductor manufacturing
Machine Vision and Applications
ACM Computing Surveys (CSUR)
Support vector domain description
Pattern Recognition Letters - Special issue on pattern recognition in practice VI
Pattern Recognition Letters - Special issue: Artificial neural networks in pattern recognition
Data mining for yield enhancement in semiconductor manufacturing and an empirical study
Expert Systems with Applications: An International Journal
Clustered defect detection of high quality chips using self-supervised multilayer perceptron
Expert Systems with Applications: An International Journal
Recognition of semiconductor defect patterns using spatial filtering and spectral clustering
Expert Systems with Applications: An International Journal
An introduction to kernel-based learning algorithms
IEEE Transactions on Neural Networks
Mercer kernel-based clustering in feature space
IEEE Transactions on Neural Networks
Survey of clustering algorithms
IEEE Transactions on Neural Networks
Ontology-based decision support system for semiconductors EDS testing by wafer defect classification
Expert Systems with Applications: An International Journal
Detection and classification of defect patterns in optical inspection using support vector machines
ICIC'13 Proceedings of the 9th international conference on Intelligent Computing Theories
Hi-index | 12.05 |
By continuously employing new technologies, huge capital investment, and well-trained engineers, integrated circuit (IC) companies compete intensively with each other to enhance product yield, reduce manufacturing cost and increase profitability. However, wafer fabrication is a complex, costly, and lengthy process that involves hundreds of chemical steps and needs to monitor lots of process parameters at the same time. As we know, IC chips fabricated on semiconductor wafers are highly vulnerable to clustered defects since defects may cause IC to completely malfunction. In particular, various types of defect patterns (i.e. scratch, ring, or zone pattern) shown on the wafer bin map (WBM) usually contain crucial information for quality engineers to track their root causes of failure. Today, many companies still rely on the visual inspection of experienced experts to check and to hand-mark the defective regions on WBM. This manual approach is not only time-consuming, but also inefficient and inconsistent owing to human fatigue. In this study, a hybrid approach that integrates spatial statistics, kernel based eigen-decomposition and support vector clustering is proposed to estimate the number of defect clusters in advance, and to separate both convex and non-convex defect clusters at the same time. Experimental results confirm that four kinds of composite defect patterns are successfully extracted and separated.