Digital image processing: concepts, algorithms and scientific applications
Digital image processing: concepts, algorithms and scientific applications
Digital image processing: principles and applications
Digital image processing: principles and applications
IEEE Transactions on Pattern Analysis and Machine Intelligence
Neural and Adaptive Systems: Fundamentals through Simulations with CD-ROM
Neural and Adaptive Systems: Fundamentals through Simulations with CD-ROM
Image Processing Techniques for Wafer Defect Cluster Identification
IEEE Design & Test
Self-organization for object extraction using a multilayer neural network and fuzziness measures
IEEE Transactions on Fuzzy Systems
A new recurrent neural-network architecture for visual pattern recognition
IEEE Transactions on Neural Networks
A neural network with asymmetric basis functions for feature extraction of ECG P waves
IEEE Transactions on Neural Networks
IEEE Transactions on Neural Networks
Wavelet-based principal component analysis applied to automated surface defect detection
ACC'08 Proceedings of the WSEAS International Conference on Applied Computing Conference
Expert Systems with Applications: An International Journal
Separation of composite defect patterns on wafer bin map using support vector clustering
Expert Systems with Applications: An International Journal
WSEAS Transactions on Computer Research
Expert Systems with Applications: An International Journal
The predictions of optoelectronic attributes of LED by neural network
Expert Systems with Applications: An International Journal
Detection and classification of defect patterns in optical inspection using support vector machines
ICIC'13 Proceedings of the 9th international conference on Intelligent Computing Theories
| Hi-index | 12.06 |
During electrical testing, each die on a wafer must be tested to determine whether it functions as originally designed. When defects, including scratches, stains or localized failed patterns, are clustered on the wafer, the tester may not detect all of the defective dies in the flawed area. A testing factory must assign a few workers to check the wafers and hand-mark the defective dies in the flawed region or close to the flawed region, to ensure that no defective die is present in the final assembly. This work presents an automatic wafer-scale defect cluster identifier that uses a multilayer perceptron to detect the defect cluster and mark all of the defective dies. The proposed identifier is compared with an existing tool used in industry. The experimental results confirm that the proposed algorithm is more effective at identifying defects and outperforms the present approach.