Related-key cryptanalysis of 3-WAY, Biham-DES, CAST, DES-X, NewDES, RC2, and TEA
ICICS '97 Proceedings of the First International Conference on Information and Communication Security
Camellia: A 128-Bit Block Cipher Suitable for Multiple Platforms - Design and Analysis
SAC '00 Proceedings of the 7th Annual International Workshop on Selected Areas in Cryptography
Impossible Differential Cryptanalysis of Reduced Round XTEA and TEA
FSE '02 Revised Papers from the 9th International Workshop on Fast Software Encryption
Implementing the TEA algorithm on sensors
ACM-SE 42 Proceedings of the 42nd annual Southeast regional conference
Area-Throughput Trade-Offs for Fully Pipelined 30 to 70 Gbits/s AES Processors
IEEE Transactions on Computers
A Regular Layout for Parallel Adders
IEEE Transactions on Computers
PRESENT: An Ultra-Lightweight Block Cipher
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Energy comparison of AES and SHA-1 for ubiquitous computing
EUC'06 Proceedings of the 2006 international conference on Emerging Directions in Embedded and Ubiquitous Computing
AES on FPGA from the fastest to the smallest
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
FSE'07 Proceedings of the 14th international conference on Fast Software Encryption
Meet-in-the-middle attacks on reduced-round XTEA
CT-RSA'11 Proceedings of the 11th international conference on Topics in cryptology: CT-RSA 2011
A comparative study of hardware architectures for lightweight block ciphers
Computers and Electrical Engineering
Multi-agent based software licensing model for embedded systems
KES-AMSTA'12 Proceedings of the 6th KES international conference on Agent and Multi-Agent Systems: technologies and applications
Three-subset meet-in-the-middle attack on reduced XTEA
AFRICACRYPT'12 Proceedings of the 5th international conference on Cryptology in Africa
Zero correlation linear cryptanalysis with reduced data complexity
FSE'12 Proceedings of the 19th international conference on Fast Software Encryption
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The tiny encryption algorithm (TEA) was developed by [4] Wheeler and Needham as a simple computer program for encryption. This paper is the first design-space exploration for hardware implementations of the extended tiny encryption algorithm. It presents efficient implementations of XTEA on FPGAs and ASICs for ultra-low power applications such as RFID tags and wireless sensor nodes as well as fully pipelined designs for high speed applications. A novel ultra-low power implementation is introduced which consumes less area and energy than a comparable AES implementation. Furthermore, XTEA is compared with stream ciphers from the eSTREAM portfolio and lightweight ciphers. The high speed implementations of XTEA operate at 20.6 Gbps (FPGA) or 36.6 Gbps (ASIC).