On a New Boolean Function with Applications
IEEE Transactions on Computers
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
Substrate Noise Coupling in Mixed-Signal ASICs
Substrate Noise Coupling in Mixed-Signal ASICs
A fast algorithm for OR-AND-OR synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Synthesis of SPP three-level logic networks using affine spaces
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Logic Minimization and Testability of 2-SPP Networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Considering the digital switching noise viewpoint, in this paper we illustrate a methodology to compare different logic synthesis techniques by applying a stochastic analysis to switching currents. The technique consists in three main steps. First, we synthesize the Boolean function into two logic expressions (classical SOP form and the three-level 2-SPP form). Then, we simulate the corresponding circuits at transistor level to obtain the switching currents. Finally, we post-process the obtained currents to obtain their amplitude density functions and power spectral densities.