Digital systems engineering
Prediction of high-performance on-chip global interconnection
Proceedings of the 11th international workshop on System level interconnect prediction
Placement and beyond in honor of Ernest S. Kuh
Proceedings of the 2011 international symposium on Physical design
An on-chip global broadcast network design with equalized transmission lines in the 1024-core era
Proceedings of the International Workshop on System Level Interconnect Prediction
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This paper introduces an accumulative prediction method to predict the eye diagram for high speed signaling systems. We use the step responses of pull-up and pull-down to extract the worst-case eye diagram, including the eye height and jitter. Furthermore, the method produces the input patterns of the worst-case intersymbol interference. The algorithm handles signals of either symmetric or asymmetric rise/fall time. Experimental results demonstrate the accuracy and efficiency of the proposed method.