Process algebra
The algebra of timed processes, ATP: theory and application
Information and Computation
MFPS '92 Selected papers of the meeting on Mathematical foundations of programming semantics
Blending Object-Z and Timed CSP: an introduction to TCOZ
Proceedings of the 20th international conference on Software engineering
A formal semantics for Verilog-VHDL simulation interoperability by abstract state machine
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Communicating sequential processes
Communications of the ACM
Formal Semantics for VHDL
Process Algebra with Timing
CADP - A Protocol Validation and Verification Toolbox
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Mathematical modelling of digital hardware systems in timed Chi
MIC '07 Proceedings of the 26th IASTED International Conference on Modelling, Identification, and Control
IFM'05 Proceedings of the 5th international conference on Integrated Formal Methods
| Hi-index | 0.00 |
Timed Chi (χ) is a timed process algebra, designed for modelling, simulation, verification and real-time control. Its application domain consists of large and complex manufacturing systems. The straightforward syntax and semantics is also highly suited to architects, engineers and researchers from the hardware design community. Since timed Chi is a well-developed algebraic theory from the field of process algebras with timing, we have the idea that timed Chi is also well-suited for addressing various aspects of hardware systems (discrete-time systems by nature). To show that timed Chi is useful for formal specification and analysis of hardware systems and our idea is correct, we illustrate the use of timed Chi with some benchmark examples of hardware systems: a multiplexer (MUX), a D flip-flop, an asynchronous arbiter and a simple arbiter (with assertion).